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In this paper, we develop a new method for the analysis of signal and image data using Discrete Wavelet Transform (DWT). The new method reduces the size of the computing devices and consumes less energy. Out of different transformation techniques, the most famous and dominant architecture is the discrete wavelet transform. The discrete wavelet transform design optimization has done on power and leakage current reduction. New adders are proposed which are based on power gating and reversible logic. It is shown that the proposed adders reduce the dynamic power by about 30%. The proposed design in 45 nm and 32 nm CMOS technology is efficient when compared to other methods.

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