Author Country (or Countries)

Kingdom of Bahrain.


low-density parity checks (LDPC) codes have received significant interest for communication system applications for their performance as error correction codes. LDPC codes outperform parallel turbo codes, which are based on a convolutional encoder. This paper proposes parallel concatenation of LDPC codes of small length. The proposed method employs a summation of the estimation output technique from the LDPC decoder. The study performed simulations to evaluate the parallel concatenation of two and three irregular LDPC codes at code rates of 1/2 and 1/3. The simulations evaluated a low number of iterations about ten only for each decoder. We further compare the bit error rate performance of different cases with an additive white Gaussian noise channel in consideration of the quadrature phase shift keying, 16-quadrature amplitude modulation and 64-quadrature amplitude modulation schemes. The study is focused on such modulation schemes related to their modern application as standard modulation types used with long - term evolution.The simulation results clearly demonstrated the improved system performance with each modulation scheme.

Digital Object Identifier (DOI)